FCQFN packages mount the semiconductor die face-down onto a copper leadframe using solder or copper pillar bumps, eliminating wire bonding and shortening the electrical path between die and package terminals.
Flip chip interconnect eliminates wire bonding, reducing parasitic resistance and inductance. Suited for high switching speeds and RF frequencies.
Copper leadframe with exposed thermal pad enables efficient heat dissipation through the PCB. Outperforms conventional wire-bond QFN for power management and high-current devices.
Package sizes from 2×2 mm to 7×7 mm, thickness as low as 0.6 mm.
Parameter
Specification
Package Size
2×2 mm to 7×7 mm
Die Size
1×1 mm to 6×6 mm
Bump Diameter
>60 µm
Wafer Thickness
>100 µm
Leadframe Thickness
15-200 µm
Package Thickness
0.6-1.0 mm
